Call: Free Silicon Photonics Active Device Fabrication for UK Institutions
As part of the EPSRC-funded CORNERSTONE project, research institutions are invited to submit mask designs to the forthcoming Silicon Photonics Multi-Project Wafer (MPW) run. This service is offered free of charge to UK institutions, but non-UK submissions are also welcomed for a charge of £35,000.
It is important that designs conform to the following design rules to ensure clarity and correct processing. For this fourth call, there are 3 Si etch processes: 1) a shallow Si etch of 70 nm (grating couplers), 2) an intermediate Si etch of 120 nm (rib waveguides), and 3) a continuation Si etch of a further 100 nm to the BOX layer (strip waveguides). There are 4 Si implant steps for active device fabrication, as well as a single metal layer for ohmic Si contacts, on top of a 1 μm thick SiO2 top cladding layer. In addition, metal heaters are also offered.
Please see the full design rules, available to download from the bottom of this page.
The deadline for mask submission is Friday 1st December 2017. For more information, visit the CORNERSTONE website.
For any queries, please contact email@example.com.