ORC Seminar Series

"Top-down and bottom-up approaches to silicon-based nanoscale information devices"

Date: Wednesday 4 July 2007
Venue: Lecture Theatre B, Building 46, University of Southampton
Time: 2pm

Performance of VLSI circuits has steadily been improved by scaling down CMOS dimensions based on Moore’s Law, and a nearly exponential growth of microelectronics capabilities has been achieved. However, maintaining the ‘More Moore’ top-down trend is getting exceedingly hard due to fundamental physics and technological limitations as well as the economical limitation. Introduction of the bottom-up approach into the conventional silicon technologies has attracted much attention along with recent progress of techniques for fabricating size-controlled silicon nanodots (SiNDs) and nanowires (SiNWs). The zero- and one-dimensional nature of the individual SiNDs and SiNWs provides novel electronic, photonic and phononic properties which are not achieved with bulk silicon, and high-performance nanoelectronic devices may be fabricated by integrating these Si nanostructures as a building block.

In this talk I will first present my recent attempt of combining the top-down and bottom-up approaches to realize ‘Beyond CMOS’ devices for information processing. Fabrication techniques and unique electronic properties such as single-electron tunneling and electron-electron interaction will be discussed for strongly-coupled SiNDs as well as their applications for nanoscale information devices. After that I will present my other attempt of integrating silicon-based nanoelectromechanical systems (NEMS) as a functional component into the conventional electronic devices. I will introduce a new fast and nonvolatile NEMS memory concept based on a mechanically-bistable floating gate which incorporates the SiNDs as charge storage. I will also discuss new operating principles of hybrid NEMS-SET (Single-Electron Transistor) systems for nanoscale memory and logic applications.

Hiroshi Mizuta received the B.S. and M.S. degrees in physics and the Ph.D. degree in electrical engineering from Osaka University, Osaka, Japan, in 1983, 1985, and 1993, respectively.

He joined the Central Research Laboratory, Hitachi Ltd., Tokyo, Japan, in 1985, and has been engaged in research on high-speed heterojunction devices and resonant tunneling devices. From 1989 to 1991, and also from 1997 to 2003, he worked on nanoscale electronic devices, in particular, single-electron memory & logic devices and high-density & high-speed memory PLEDM® as the Laboratory Manager and Senior Researcher at the Hitachi Cambridge Laboratory, Cambridge, UK., From October 2003 to March 2007, he has been an Associate Professor at the Department of Physical Electronics, Tokyo Institute of Technology. Since April 2007, He is a Professor of Nanoelectronics, School of Electronics and Computer Science, University of Southampton, U.K., concurrently a Visiting Professor of Quantum Nanodevices at the Department of Physical Electronics, Tokyo Institute of Technology. His current research interests include silicon based nanoelectronics, quantum information processing, silicon nanostructures such as silicon nanodots and nanowires, silicon nanoelectromechanical devices, and ab-initio simulation of material and transport properties of silicon nanostructures. He has coauthored more than 200 scientific papers and filed over 50 patents. He has also published books and chapters, including “Physics and Applications of Resonant Tunnelling Diodes”, Cambridge University Press, 1995.

Dr Mizuta is a member of the Physical Society of Japan, the Japan Society of Applied Physics, the Institute of Physics, and the Electron Device Society of the IEEE. He is also a member of the International Advisory Board of the MacDiarmid Institute for Advanced Materials and Nanotechnology, New Zealand Centres of Research Excellences (CoREs).